Job details
Job type full-time
Full job description
Job title: physical verification engineer
Location: san diego, ca or 100% remote
Full-time: salary + benefits + bonuses
As a member of the encore semi physical design team, you will perform various types of physical verification checks such as lvs and drc at the chip and block levelYou`ll work with the rest of the design team for flow bring up and validationYou will work directly with the pd implementation team during the entire chip design cycle to drive signoff closure for tape-outYou will lead schedules and support cross-functional engineering effortsYou`ll work on pad-ring, bump, rdl design.
Requirements:
Bsee with 8+ years of physical design experience, with emphasis on physical verification
Industry experience in system on chip (soc) design process
Strong knowledge of physical verification flows and methodology
Expert in mentor calibre tool for drc/lvs/erc/antenna
Deep understanding of design rule checks for drc and erc runsets, writing from scratch and/or modifying existing ones
Scripting skills to debug flow related issues and make enhancements as appropriate (python, tcl, skill and/or perl)
Tape-out experience in various technology nodes
Exposure to tsmc or gf finfet technology nodes
Custom layout design background and experience a plus
